link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 AD8250Data SheetParameterConditionsMinTypMaxUnit Settling Time 0.001% ΔOUT = 10 V step G = 1 615 ns G = 2 635 ns G = 5 635 ns G = 10 685 ns Slew Rate G = 1 20 V/μs G = 2 25 V/μs G = 5 25 V/μs G = 10 25 V/μs Total Harmonic Distortion f = 1 kHz, RL = 10 kΩ, ±10 V, −110 dB G = 1, 10 Hz to 22 kHz band-pass filter GAIN Gain Range G = 1, 2, 5, 10 1 10 V/V Gain Error OUT = ±10 V G = 1 0.03 % G = 2, 5, 10 0.04 % Gain Nonlinearity OUT = −10 V to +10 V G = 1 RL = 10 kΩ, 2 kΩ, 600 Ω 6 ppm G = 2 RL = 10 kΩ, 2 kΩ, 600 Ω 8 ppm G = 5 RL = 10 kΩ, 2 kΩ, 600 Ω 8 ppm G = 10 RL = 10 kΩ, 2 kΩ, 600 Ω 10 ppm Gain vs. Temperature All gains 10 ppm/°C INPUT Input Impedance Differential 5.3||0.5 GΩ| pF Common Mode 1.25||2 GΩ| pF Input Operating Voltage Range VS = ±5 V to ±15 V −VS + 1.5 +VS − 1.5 V Over Temperature T = −40°C to +85°C −VS + 1.6 +VS − 1.7 V OUTPUT Output Swing −13.5 +13.5 V Over Temperature T = −40°C to +85°C −13.5 +13.5 V Short-Circuit Current 37 mA REFERENCE INPUT RIN 20 kΩ IIN +IN, −IN, REF = 0 1 μA Voltage Range −VS +VS V Gain to Output 1 ± 0.0001 V/V DIGITAL LOGIC Digital Ground Voltage, DGND Referred to GND −VS + 4.25 0 +VS − 2.7 V Digital Input Voltage Low Referred to GND DGND 2.1 V Digital Input Voltage High Referred to GND 2.8 +VS V Digital Input Current 1 μA Gain Switching Time1 325 ns tSU See Figure 3 timing diagram 20 ns tHD See Figure 3 timing diagram 10 ns t WR -LOW See Figure 3 timing diagram 20 ns t WR -HIGH See Figure 3 timing diagram 40 ns Rev. C | Page 4 of 24 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Diagram Absolute Maximum Ratings Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Gain Selection Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode Power Supply Regulation and Bypassing Input Bias Current Return Path Input Protection Reference Terminal Common-Mode Input Voltage Range Layout Grounding Coupling Noise Common-Mode Rejection RF Interference Driving an ADC Applications Differential Output Setting Gains with a Microcontroller Data Acquisition Outline Dimensions Ordering Guide
