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Datasheet Microchip MDB1900ZCQZ

ПроизводительMicrochip
СерияMDB1900ZC
МодельMDB1900ZCQZ

The MDB1900ZC is a true zero delay buffer with fully integrated high-performance, low-power, and low phase noise programmable PLL

Datasheets

  • Скачать » Datasheet PDF, 1.0 Мб, Файл опубликован: 9 ноя 2015
    MDB1900ZB - Zero Delay Buffer for PCIe, SAS, SATA, ESI, and QPI
    Выписка из документа ↓
    MDB1900ZB
    Zero Delay Buffer
    for PCIe (Gen1/Gen2/Gen3),
    SAS, SATA, ESI, and QPI General Description Features The MDB1900ZB is a true zero delay buffer with a fullyintegrated, high-performance, low-power, and low-phase
    noise programmable PLL. Supports zero delay (0ps) buffer mode for 100MHz and
    133MHz clock frequencies. External feedback path for true zero delay operations Zero delay (PLL) mode can filter jitter in incoming clock Selectable PLL bandwidth for PLL mode Supports fanout buffer mode for clock frequencies
    between 0 and 250MHz Differential input reference with HCSL logic (0~0.7V) Nineteen differential HCSL-compatible clock output
    pairs Eight dedicated OE# pins to control their assigned
    output. Glitch free assertion/de-assertion. Spread spectrum modulation tolerant for EMI reduction SMBus interface for controlling output properties
    (enable/disable and delay tuning) Disabled outputs in power-down mode for maximum
    power savings Nine selectable SMBus addresses so multiple devices
    can share the same SMBus 3.3V or 2.5V operation Commercial temperature range (0В°C to +70В°C) 72-pin 10mm Г— 10mm QFN package GREEN, RoHS, and PFOS compliant The MDB1900ZB is capable of distributing the reference
    clocks for PCIe (Gen1/Gen2/Gen3), SATA, ESI, SAS, SMI
    В®
    and Intel Quickpath Interconnect (QPI). The MDB1900ZB
    works in conjunction with a CK410B+, CK509B or
    CK420BQ clock synthesizer to provide reference clocks to
    multiple agents.
    The MDB1900ZB is designed for Intel’s DB1900Z
    specification. The Intel part designation for the
    MDB1900ZB is identified as G20746-002.
    Datasheets and support documentation are available on
    Micrel’s web site at: www.micrel.com. Block Diagram Applications PCI Express timing (Gen1/2/3) in Intel platforms, ...
  • Скачать » Datasheet PDF, 980 Кб, Файл опубликован: 9 ноя 2015
    MDB1900ZC - Zero Delay Buffer for PCIe, SAS, SATA, ESI, and QPI
    Выписка из документа ↓
    MDB1900ZC
    Zero Delay Buffer
    for PCIe (Gen1/Gen2/Gen3),
    SAS, SATA, ESI, and QPI General Description Features The MDB1900ZC is a true zero delay buffer with a fully
    integrated, high-performance, low-power, and low-phase
    noise programmable PLL. Supports zero delay (0ps) buffer mode for 100MHz and
    133MHz clock frequencies. Internal feedback path for zero delay (PLL) mode Zero delay (PLL) mode can filter jitter in incoming clock Selectable PLL bandwidth for PLL mode Supports fanout buffer mode for clock frequencies
    between 0MHz and 250MHz Differential input reference with HCSL logic (0V~0.7V) Nineteen differential HCSL-compatible clock output
    pairs Eight dedicated OE# pins to control their assigned
    output. Glitch free assertion/de-assertion. Spread spectrum modulation tolerant for EMI reduction SMBus interface for controlling output properties
    (enable/disable and delay tuning) Disabled outputs in power-down mode for maximum
    power savings Nine selectable SMBus addresses so multiple devices
    can share the same SMBus 3.3V or 2.5V operation Commercial or industrial temperature ranges 72-pin 10mm Г— 10mm QFN package GREEN, RoHS, and PFOS compliant The MDB1900ZC is capable of distributing the reference
    clocks for PCIe (Gen1/Gen2/Gen3), SATA, ESI, SAS, SMI,
    В®
    and Intel Quickpath Interconnect (QPI). The MDB1900ZC
    works in conjunction with a CK410B+, CK509B, or
    CK420BQ clock synthesizer to provide reference clocks to
    multiple agents.
    The MDB1900ZC is designed for Intel’s DB1900Z
    specification with the exception that the zero delay buffer
    feedback path is inside the IC and does not need to be
    built onto the PCB. ...

Цены

Статус

Статус продуктаВ производстве (Подходит для новых разработок, но могут существовать и более новые альтернативы)

Корпус / Упаковка / Маркировка

КорпусVQFN
Количество выводов72

Параметры

No. of Outputs19

Экологический статус

RoHSСовместим

Другие варианты исполнения

MDB1900ZB

Модельный ряд

Серия: MDB1900ZC (4)

Классификация производителя

  • Clock and Timing > Clock and Data Distribution > Zero Delay Buffers PCIe Buffers

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