Datasheet AD526 (Analog Devices) - 14

AD526 HIGH ACCURACY A/D CONVERTERS
hunting during the calibration process, the reference offset and Very high accuracy and high resolution floating-point A/D con- gain codes should be different from the endpoint codes. A cali- verters can be achieved by the incorporation of offset and gain bration cycle consists of selecting whether gain or offset is to be calibration routines. There are two techniques commonly used calibrated then selecting the appropriate multiplexer channel to for calibration, a hardware circuit as shown in Figure 43 and/or apply the reference voltage to the signal channel. Once the op- a software routine. In this application the microprocessor is eration has been initiated, the counter, a 74ALS869, drives the functioning as the autoranging circuit, requiring software over- D/A converter in a linear fashion providing a small correction head; therefore, a hardware calibration technique was applied voltage to either the gain or offset trim point of the AD574. The which reduces the software burden. The software is used to set output of the A/D converter is then compared to the value pre- the gain of the AD526. In operation the signal is converted, and set in the 74ALS528 to determine a match. Once a match is if the MSB of the AD574 is not equal to a Logical 1, the gain is detected, the 74ALS528 produces a low going pulse which stops increased by binary steps, up to the maximum gain. This maxi- the counter. The code at the D/A converter is latched until the mizes the full-scale range of the conversion process and insures next calibration cycle. Calibration cycles are under the control a wide dynamic range. of the microprocessor in this application and should be imple- The calibration technique uses two point correction, offset and mented only during periods of converter inactivity. gain. The hardware is simplified by the use of programmable magnitude comparators, the 74ALS528s, which can be “burned” for a particular code. In order to prevent under or over range
+5V +15V –15V 200pF 10
m
F + 10
m
F + –15V +15V MSB NOISE AD585 REDUCTION 7404 1
m
F 2 1 +15V +5V F AD574 DATA A3 R8 BUS S –15V +15V A1 AD588 10k
V
AD7501 AD526 R1 R4 VIN1 VREF OP27 A4 –5V V 1k
V
R2 R5 IN2 V WR +V IN3 LSB S +15V 50k
V
R3 R6 0.1
m
F V A2 IN4 –V SYS –15V S GND 0.1
m
F DE- +5V –15V DECODED DECODED WR WR CODED ADDRESS ADDRESS ADD ADDRESS BUS 12 12 +5V CALIBRATION R5 MSB PRESET +5V +5V PIN 15 VALUE AD588 20k
V
PIN 28 5k
V
V R62 REF 74ALS AD574 20k
V
528 R72 A2 RFB A R21 10k
V
GAIN P = Q AD7628 R11 1 MSB AD712 3 C12 5k
V
7475 2 7400 INPUT GAIN LATCH DAC A OUT A A1 1/2 BUFFER AGND 74ALS AD712 869 ADG221 RFB B R41 LSB 7475 WR C22 CONTROL OUT B A3 MSB 4 6 LSB LOGIC LATCH DAC B R8 7475 5 7400 20k
V
1/2 AD712 R92 74ALS AGND 10k
V
528 WR A +5V /B R102 A2 P = Q VREF 20k
V
OFFSET R12 PIN 15 AD712 5k
V
OFFSET AD588 +5V AGND NOTE: ALL BYPASS CAPACITORS ARE 0.1
m
F LSB +5V
Figure 43. High Accuracy A/D Converter REV. D –13–