Application Note «Fault-Tolerant Analog Switches» (Maxim) - 2

other sensitive circuitry. During fault conditions, only leakage currents flow into the switch or mux, removing the chances of chip destruction related to power damage. Like their three-FET predecessors, switches and multiplexers realized with this new process and architecture revert to a high-impedance state when their power supplies are off, thus eliminating fault problems under this condition. Switches incorporating this new process and architecture include the MAX4511/MAX4512/MAX4513 (quad SPSTs) product family. Muxes include the MAX4508/MAX4509 (single 8-to-1 and dual 4-to-1 multiplexers) family. Another group of devices, called "signal-line circuit protectors," also utilizes this new architecture. Circuit designers use this type of device when faced with the faults described above, without the need for switching or multiplexing signals. Thus, these circuit protectors protect individual signal lines from excessive voltages; they protect themselves and the circuitry downstream from them, regardless of whether they are powered or not. Much like a fault-protected switch or mux, when powered, a circuit protector protects the downstream circuitry by limiting the voltage at its output to within the supply voltages powering it. When the power to a circuit protector is off, it becomes an open circuit, also like the fault-protected switches and muxes. The MAX4505 (protecting a single line), the MAX4506 (protecting three lines), and the MAX4507 (protecting eight lines) are signal-line circuit protectors designed with the new process and architecture. The Standard Parallel-MOSFET CMOS Analog Switch In a typical CMOS output stage for an analog switch (see
Figure 1
), N1 represents the n-channel MOSFET and P1 the p-channel MOSFET. These MOSFETs form a parallel, complementary-output configuration capable of switching Rail-to-Rail signals. The gates of N1 and P1 are driven by on-chip driver circuitry, with the N1 gate 180° out of phase with respect to the P1 gate (so, when the N1 gate is at +15V, the P1 gate is at -15V, and vice versa). Figure 1. In this structure (Figure 1 again), when an analog input signal exceeds the gate voltage by the threshold value, the output stage conducts this fault right through the switch to the output. Also, if the power supplies are off while signals are present at the input (that is, there is 0V on the gates of N1 and P1), any signal exceeding the threshold value of N1 or P1 is conducted through the switch. These fault conditions can cause large currents to flow into the chip due to the resulting forward-biased diode conditions, leading to localized damage in the part, or they can cause a latchup condition that can destroy N1 or P1. For example, if a +25V signal appears accidentally at the input with the +15V and - Page 2 of 8 Document Outline maxim-ic.com Fault-Tolerant Analog Switches - Application Note - Maxim